Research Catalog

An optimized implementation of a fault-tolerant clock synchronization circuit

Title
  1. An optimized implementation of a fault-tolerant clock synchronization circuit [microform] / Wilfredo Torres-Pomales.
Published by
  1. Hampton, Va. : National Aeronautics and Space Administration, Langley Research Center ; [Springfield, Va. : National Technical Information Service, distributor, 1995]
Author
  1. Torres-Pomales, Wilfredo.

Details

Additional authors
  1. Langley Research Center.
Description
  1. 1 v.
Series statement
  1. NASA technical memorandum ; 109176
Subject
  1. Circuits
  2. Clocks
  3. Computer components
  4. Fault tolerance
  5. Synchronism
Call number
  1. READEX Microfiche NAS 1.15:109176
Note
  1. Distributed to depository libraries in microfiche.
  2. Shipping list no.: 95-0615-M.
Reproduction (note)
  1. Microfiche.
Author
  1. Torres-Pomales, Wilfredo.
Title
  1. An optimized implementation of a fault-tolerant clock synchronization circuit [microform] / Wilfredo Torres-Pomales.
Imprint
  1. Hampton, Va. : National Aeronautics and Space Administration, Langley Research Center ; [Springfield, Va. : National Technical Information Service, distributor, 1995]
Series
  1. NASA technical memorandum ; 109176
Reproduction
  1. Microfiche. [Washington, D.C. : National Aeronautics and Space Administration, 1995] 1 microfiche.
Added author
  1. Langley Research Center.
Gpo item no.
  1. 0830-D (MF)
Sudoc no.
  1. NAS 1.15:109176
Research call number
  1. READEX Microfiche NAS 1.15:109176
View in legacy catalog