Functional decomposition with application to FPGA synthesis
- Title
- Functional decomposition with application to FPGA synthesis / by Christoph Scholl.
- Published by
- Boston : Kluwer Academic Publishers, [2001], ©2001.
- Author
Items in the library and off-site
Displaying 1 item
Status | Format | Access | Call number | Item location |
---|---|---|---|---|
Status | FormatBook/Text | AccessRequest in advance | Call numberTK7895.G36 S36 2001 | Item locationOff-site |
Details
- Description
- xxiii, 263 pages : illustrations; 25 cm
- Subject
- Contents
- 1. Realizations of Boolean Functions. 1.1. Circuits. 1.2. Boolean Expressions. 1.3. Binary Decision Diagrams (BDDs). 1.4. Field Programmable Gate Arrays (FPGAs). 1.5. Complexity of realizations of Boolean functions -- 2. Minimization of BDDs. 2.1. BDD minimization for completely specified functions. 2.2. BDD minimization for incompletely specified functions -- 3. Functional Decomposition for Completely Specified Single-Output Functions. 3.1. Definitions. 3.2. Decomposition and Field Programmable Gate Arrays. 3.3. Minimizing the number of decomposition functions. 3.4. Nontrivial decomposability - theoretical considerations. 3.5. Examples of circuits derived by decomposition. 3.6. Decomposition and ROBDD representations. 3.7. Variable partitioning. 3.8. The encoding problem -- 4. Functional Decomposition for Completely Specified Multi-Output Functions. 4.1. A motivating example. 4.2. Output partitioning and input partitioning.
- 4.3. Computation of common decomposition functions. 4.4. Experiments. 4.5. Alternative methods -- 5. Functional Decomposition for Incompletely Specified Functions. 5.1. Decomposition and BDD minimization for incompletely specified functions. 5.2. One-sided decomposition of incompletely specified functions. 5.3. Two-sided decomposition of incompletely specified functions. 5.4. Computation of incompletely specified decomposition and composition functions. 5.5. Multi-output functions. 5.6. Experimental results -- 6. Non-Disjoint Decompositions. 6.1. Motivation. 6.2. Integration of non-disjoint into disjoint decomposition. 6.3. Computing non-disjoint variable sets for decomposition -- 7. Large Circuits -- An example for an FPGA device -- Complexity of CM -- Characterization of weak and strong symmetry -- Complexity of MSP -- Making a function strongly symmetric -- Compatibility of don't care minimization methods -- Symmetries and decomposability -- Complexity of CDF --
- ROBDD based computation of compatibility classes -- Maximal don't care sets.
- Owning institution
- Columbia University Libraries
- Bibliography (note)
- Includes bibliographical references (p. 253-258) and index.